1. Field of the Invention
The invention relates to an erase verification method, and more particularly to an erase verification method of a serial flash memory for reducing the time of erase verification.
2. Description of Related Art
A flash memory is usually divided into a plurality of physical blocks, and for the convenience of description, these physical blocks will be referred as blocks thereinafter. Each bit in a block of a flash memory can only be programmed from “1” to “0”. Accordingly, an erasing operation has to be performed before writing data to a memory address which contains old data. Each block is usually divided into a plurality of sectors, and each sector is the smallest programming unit. Namely, each sector is the smallest unit for writing or reading data, such as in a single level cell (SLC) NAND flash memory having the number of program (NOP) as 4.
For a serial flash memory, multiple sectors share a Pwell for saving chip area since sector area is small. Unfortunately, sharing the same Pwell has the so-called “Pwell disturbance” problem. When an erase (ERS) pulse is applied to the multiple sectors sharing the same Pwell, the Pwell is biased a specific voltage about 7V, so that the selected sectors and the de-selected sectors both have the same bias voltage. In the meanwhile, word lines corresponding to the selected sectors have a negative voltage about −9V, but word lines corresponding to the de-selected sectors have a positive voltage about 2V or zero voltage. Due to the same bias voltage on the Pwell during ERS, the electrons existing in the de-selected sectors may also be gradually lost, so that there is disturbance on the de-selected sectors. Accordingly, every time a flash memory sector is erased, there is always a possibility that threshold voltage of flash memory cells thereof becomes lower.
FIG. 1 is a flowchart of a conventional method for erasing multiple sectors sharing a Pwell. It is noted that the de-selected sector i represents the i-th de-selected sector, and this definition is also applied on the other description in the specification. Firstly, the erase pulse is applied to a selected sector or selected sectors of the multiple sectors in step S110. As known from above, an erase verification (ERSV) is needed for sequentially checking the threshold voltage of the flash memory cells in the de-selected sector if the threshold voltage of the flash memory cells is higher than a predetermined voltage such as about 3V. This is achieved by measuring current during ERSV. If current from the cell can be measured, it means the threshold voltage of the cell is lower than 3V. In step S120, the ERSV is sequentially performed on all of de-selected sectors to check state of the de-selected sector.
If the ERSV reads a program state (or a “0” state) in step S120, the de-selected sector i passes the ERSV, which means the floating gate of the cell has electrons existing therein. After that, the flow goes to the next step S150 where the index of the de-selected sector from i to i+1. While the index of the de-selected sector is maximum in step S160, the method terminates. Otherwise, the flow returns to the step S120, where the ERSV will be perform on the next de-selected sector. If the ERSV fails to read the program state, it means the de-selected sector i has a Pwell disturbance, and thus a program verification (PGMV) is performed on the de-selected sector i to check for bit line leakage in the de-selected sector i in step S130. If the check result fails in step S130, it means the de-selected sector i has bit line leakage, and then a re-program is performed on the de-selected sector i to fix the leakage in the de-selected sector i in step S140. After the re-program, the de-selected sector i is verified again in step S130. The loop of steps S130 and S140 is repeated until the de-selected sectors i is completely fixed. Now all of the de-selected sectors have passed the ERSV in step S120 and the PGMV in step S130, and the flow of the method terminates.
This method is used in general to eliminate the Pwell disturbance due to the erasing operation in serial flash memory before another erase pulse is applied. However, it is possible that the de-selected sectors suffer from no Pwell disturbance after one time of the ERS, but the ERSV is still performed on all of the de-selected sectors again and again every time. A lot of time would be wasted in such a situation.